Fast fourier transform architecture
US8396913B2 · kind B2 · utility
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6References
11Claims
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Key dates
| Filing date | Apr 11, 2006 |
| Grant date | Mar 12, 2013 |
| Priority date | — |
| Expiry date | Sep 9, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/142
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A last fourier transform architecture has parallel data processing paths. Input data is applied to the parallel data processing paths in a repeating sequence, and processed in those paths. Data sequencers are used to combine the outputs from the data processing paths into the required sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.