Packet sequence number tracking for an anti-replay window
US8396985B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 11, 2010 |
| Grant date | Mar 12, 2013 |
| Priority date | — |
| Expiry date | Aug 1, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/108
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Described embodiments provide a network processor that includes a security sub-processor to prevent replay attacks on the network processor. A memory stores an anti-replay window corresponding to a data stream of the network processor. The anti-replay window has N bits initialized to correspond to data packet sequence numbers in the range 1 to N. The anti-replay memory is stored in a plurality of data words. A plurality of flip-flops store word valid bits corresponding to each of the data words. A multiplexer selects the word valid bit corresponding to a data word requested by the security processor, and an AND gate performs a bitwise AND operation between the selected data word and word valid bit. When the network processor receives a data packet, the security sub-processor determines a value of the received sequence number with respect to minimum and maximum values of a sequence number range of the anti-replay window.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.