Recursive realization of polynomial permutation interleaving
US8397123B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2009 |
| Grant date | Mar 12, 2013 |
| Priority date | — |
| Expiry date | Feb 3, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6525
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and methodologies are described that facilitate automatically generating interleaved addresses during turbo decoding. An efficient recursive technique can be employed in which layers of nested loops enable the computation of a polynomial and a modular function given interleaved parameters “a” and “b” from a look up table. With the recursive technique, interleaved addresses can be generated, one interleaved address per clock cycle which can maintain turbo decoding performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.