Process of manufacturing low resistance damascene coils
US8397371B2 · kind B2 · utility
0Cited by
7References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 17, 2010 |
| Grant date | Mar 19, 2013 |
| Priority date | — |
| Expiry date | Dec 7, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49064
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment and method of the present invention, a coil of a write head is created by forming a P1 pedestal layer and a back gap layer and further forming a coil pattern consistent with the coil to be formed and insulator spacers dispersed in the coil pattern, using a non-damascene process, thereafter the coil is formed by plating using a damascene process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.