Quiescent current control for class AB output stages
US8400220B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2011 |
| Grant date | Mar 19, 2013 |
| Priority date | — |
| Expiry date | Sep 13, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45674
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Quiescent current control for Class AB output stages is provided that is responsive to a sum of current of the pull-up and pull-down transistors in the crossover region, and responsive to a minimum of the pull-up or pull-down transistors otherwise. Replicating transistors operate responsive to activation of the pull-up and pull-down transistors. Additional circuit elements provide a summed current output that corrects for quiescent current variation, while having good operation over PVT variations, and having minimal distortive effects. Use of scaled replicating transistors reduces the current in the quiescent current control circuit. Additionally, a current limiter or topology change may be used to reduce current spikes in replication of the output stage current. Adjustment of a reference current can also prevent turning off a non-active output element to reduce the need to stew the element back on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.