Amplifier arrangement
US8400223B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2011 |
| Grant date | Mar 19, 2013 |
| Priority date | — |
| Expiry date | Feb 7, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/366
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier arrangement with an amplifier arrangement input and an amplifier arrangement output is disclosed. The amplifier arrangement comprises a first transistor and a first ballast resistance, wherein the first ballast resistance connects a first transistor base of the first transistor to a common base terminal at least one second transistor and at least one second ballast resistance, wherein the at least one second ballast resistance connects a second transistor base of the at least second transistor to the common base terminal; and a feedback device comprising a feedback input terminal for sensing at least a base voltage of the first transistor and further comprising a feedback output terminal that is connected to the common base terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.