Patent · US Active

Circuit for impedance matching

US8400233B2 · kind B2 · utility

0Cited by

13References

12Claims

0Family size

Assignee

EPCOS AG · DE

Inventors

Patrick Scheele · Darmstadt, DE
Matthias Schmidt · Munich, DE

Key dates

Filing date	Nov 19, 2010
Grant date	Mar 19, 2013
Priority date	—
Expiry date	Nov 19, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH03H2007/386
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A circuit provided for impedance matching includes an input, an output and four impedance elements arranged between them. In this case, two of the impedance elements are connected in series in a main path and form a T configuration with a third component. In addition, a fourth component is connected in parallel with the main path of the circuit. By way of example, the components arranged in the main path are variable capacitances and the further components are inductances.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.