Dynamic load balancing in multiple video processing unit (VPU) systems
US8400457B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2009 |
| Grant date | Mar 19, 2013 |
| Priority date | — |
| Expiry date | Jan 12, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. An interlink module is coupled to receive processed data corresponding to the frames from each of the processors. The interlink module divides a first frame into multiple frame portions by dividing pixels of the first frame using at least one balance point. The interlink module dynamically determines a position for the balance point that minimizes differences between the workload of the processors during processing of commands and/or data of one or more subsequent frames.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.