Rate proportional cache write-back in a storage server
US8402226B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2010 |
| Grant date | Mar 19, 2013 |
| Priority date | — |
| Expiry date | Feb 25, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0868
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Based on a count of the number of dirty pages in a cache memory, the dirty pages are written from the cache memory to a storage array at a rate having a component proportional to the rate of change in the number of dirty pages in the cache memory. For example, a desired flush rate is computed by adding a first term to a second term. The first term is proportional to the rate of change in the number of dirty pages in the cache memory, and the second term is proportional to the number of dirty pages in the cache memory. The rate component has a smoothing effect on incoming I/O bursts and permits cache flushing to occur at a higher rate closer to the maximum storage array throughput without a significant detrimental impact on client application performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.