Power management in electronic systems
US8402293B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2011 |
| Grant date | Mar 19, 2013 |
| Priority date | — |
| Expiry date | Jun 28, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.