Semiconductor devices and methods of fabricating the same
US8405158B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2010 |
| Grant date | Mar 26, 2013 |
| Priority date | — |
| Expiry date | Sep 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/35
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device and method of manufacturing the same, the device including string structures, the string structures including two or more adjacent string selection transistors connected in series to each other in a first direction and being spaced apart from one another in a second direction intersecting the first direction, the two or more string selection transistors having different threshold voltages; string selection lines, the string selection lines connecting the adjacent string selection transistors of the string structures in the second direction; and a bit line electrically connecting two or more adjacent string structures, wherein a device isolation layer between the adjacent string selection transistors in the second direction has recessed regions, and profiles of the recessed regions on respective sides of the string selection transistors are different from each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.