Patent · US Active

System and method for calibrating output frequency in phase locked loop

US8405434B2 · kind B2 · utility

1Cited by
6References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 19, 2011
Grant dateMar 26, 2013
Priority date
Expiry dateSep 23, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/087
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A Digital Calibration System for a Phase Locked Loop includes a Tuning Voltage Controller configured to set the tuning voltage to a value; a Phase Difference Quantizer configured to output a phase difference after comparing a phase of the reference signal with a phase of the feedback signal; a Digital Controller configured to receive the phase difference of the PDQ and control a coarse tuning signal such that an average phase difference of the PDQ is 0; and a Frequency Calibration Logic configured to calibrate the feedback signal in response to the output of the DC.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.