System and method for reducing line current distortion
US8406021B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 9, 2010 |
| Grant date | Mar 26, 2013 |
| Priority date | — |
| Expiry date | Sep 24, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A power factor correction (PFC) system includes an adjustment module, a compensation module, and a duty cycle control module. The adjustment module generates N time advances based on N predetermined time advances and (N−1) time advance adjustments, wherein N is an integer greater than zero. The compensation module generates N compensated versions of an input alternating current (AC) line signal by predicting ahead of the input AC line signal using a gradient of a sinusoidal reference signal and the N time advances, respectively, wherein the sinusoidal reference signal is synchronized with the input AC line signal in phase and frequency. The duty cycle control module generates PFC duty cycles based on the N compensated versions of the input AC line signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.