Signal processor and signal processing method
US8406277B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 8, 2006 |
| Grant date | Mar 26, 2013 |
| Priority date | — |
| Expiry date | Feb 23, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01S19/30
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Radiolocalization receiver for a satellite radiolocalization system like GPs, Galileo or the like, including a staged correlation and accumulation unit, in which the correlation data is biased in order to be to always non-negative. Thanks to this feature, the accumulated data grow monotonically during the accumulation. Overflow rate of a first correlation stage (100, 150-153) is scaled down respect to the rate of the input data. Thus the higher correlation stages (200, 154-158) can be used in multiplex. The bit-flip rate in memories is very low, with an effective reduction of dynamic power consumption. The logic structure of the accumulator is also simplified by the invention, thus further savings in silicon space and power are possible.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.