Processing with compact arithmetic processing element
US8407273B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 17, 2012 |
| Grant date | Mar 26, 2013 |
| Priority date | — |
| Expiry date | Feb 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17728
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor or other device, such as a programmable and/or massively parallel processor or other device, includes processing elements designed to perform arithmetic operations (possibly but not necessarily including, for example, one or more of addition, multiplication, subtraction, and division) on numerical values of low precision but high dynamic range (“LPHDR arithmetic”). Such a processor or other device may, for example, be implemented on a single chip. Whether or not implemented on a single chip, the number of LPHDR arithmetic elements in the processor or other device in certain embodiments of the present invention significantly exceeds (e.g., by at least 20 more than three times) the number of arithmetic elements, if any, in the processor or other device which are designed to perform high dynamic range arithmetic of traditional precision (such as 32 bit or 64 bit floating point arithmetic).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.