Systems and methods for implementing reduced power states
US8407504B2 · kind B2 · utility
3Cited by
8References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 30, 2010 |
| Grant date | Mar 26, 2013 |
| Priority date | — |
| Expiry date | Jan 31, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In some embodiments, provided is a way for devices to request S0ix (or the like) entry and exit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.