Area efficient EMI reduction technique for H-bridge current mode transmitter
US8410828B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 2010 |
| Grant date | Apr 2, 2013 |
| Priority date | — |
| Expiry date | Jun 9, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/164
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to a driver circuit used to transmit a digital signal from a source device to a destination device. The driver circuit provides a controlled switching time to improve digital signal quality, while reducing electromagnetic interference. In the circuit, a pair of first switches of a first plurality are coupled in parallel between a first current node and respective ones of first and second output terminals. A plurality of pairs of second switches of a second plurality are coupled in parallel between a respective second current node and the first and second output terminals. Timing circuitry applies input signals to the pair of first switches and successive input signals to the pairs of second switches so as to develop a staggered voltage across a load coupled between the first and second output terminals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.