Method and apparatus for reducing power consumption for memories
US8412972B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2010 |
| Grant date | Apr 2, 2013 |
| Priority date | — |
| Expiry date | Mar 10, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described herein are a method and an apparatus for reducing power consumption of memories by monitoring the power states of the memories via an operating system. The method comprises reading counter values corresponding to power states of each memory of a plurality memories; computing a power state usage corresponding to the power states of each memory of the plurality, the computing based on the counter values; determining whether the power state usage exceeds a predetermined threshold usage; and adjusting current and future usage of each memory of the plurality in response to determining that the power state usage exceeds the predetermined threshold usage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.