Systems and methods for retimed virtual data processing
US8413020B2 · kind B2 · utility
1Cited by
84References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2012 |
| Grant date | Apr 2, 2013 |
| Priority date | — |
| Expiry date | Aug 8, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/41
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the present invention provide systems and methods for data processing system. As one example, a data processing circuit is described that includes an analog to digital converter, an online timing loop, and an offline timing loop. The analog to digital converter receives an analog input and provides a first series of data samples Each bit of the first series of data samples corresponds to the analog input at a time controlled by an updated sampling clock. The online timing loop modifies the updated sampling clock based at least in part upon a processed version of the first series of data samples.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.