Method for designing masks used to form electronic components
US8413082B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 27, 2011 |
| Grant date | Apr 2, 2013 |
| Priority date | — |
| Expiry date | May 27, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for designing masks adapted to the forming of integrated circuits, including the steps of: (a) forming a first test file including a set of configurations of integrated circuit elements; (b) forming a second test file comprising the elements of the first test file, less the elements corresponding to configurations forbidden by design rule manuals; (c) trans-forming the second test file by means of a set of logical operations implemented by computing means to obtain a mask file; (d) testing the mask file and, if the test is negative, modifying the design rule manuals; and (e) repeating steps (a) to (d) until the test of step (d) is positive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.