Circuit and method for reducing noise in class D amplifiers
US8416017B2 · kind B2 · utility
13Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2010 |
| Grant date | Apr 9, 2013 |
| Priority date | — |
| Expiry date | Oct 19, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/21193
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for reducing noise in Class D amplifiers has a power stage voltage control means (17, 21, 22) responsive to defined signal conditions of the audio signal input (1). The power stage voltage control means is operative to lower the voltage at the supply voltage input (31) of the amplifier's switching power output stage (30) upon the detection of a defined condition in the audio signal input such that the Class-D amplifier operates at reduced voltage (“idles”) during the defined audio input signal condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.