Method of implementing memristor-based multilevel memory using reference resistor array
US8416604B2 · kind B2 · utility
11Cited by
1References
6Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Jan 20, 2011 |
| Grant date | Apr 9, 2013 |
| Priority date | — |
| Expiry date | Jul 1, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5634
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a memristor, and more particularly, to a method of implementing a memristor-based multilevel memory using a reference resistor array and a write-in circuit and a read-out/restoration circuit for the memristor-based multilevel memory, in which a memristor can be used as a multilevel memory. In the present invention, a reference resistance value is written in a selected memristor of a memristor array by applying repeatedly the current pulses of which widths are proportional to the difference between the resistances of the selected memristor and the selected node of the reference resistor array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.