Dynamically configurable serial data communication interface
US8417836B2 · kind B2 · utility
7Cited by
5References
38Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 5, 2012 |
| Grant date | Apr 9, 2013 |
| Priority date | — |
| Expiry date | Mar 5, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4291
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A serial peripheral interface (SPI) controller can be configured in response to data received via the interface. The SPI controller can perform read and write operations upon registers of a register bank in response to signals received via one or more of a data signal line, a clock signal line, and a select signal line. By detecting combinations of signals on one or more of the data signal line, clock signal line and select signal line, the SPI controller can detect the initiation of data read and write operations that may be in accordance with any of several different SPI protocols.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.