System and method for providing locale-based optimizations in a transactional memory
US8417897B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2010 |
| Grant date | Apr 9, 2013 |
| Priority date | — |
| Expiry date | May 15, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/467
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The system and methods described herein may reduce read/write fence latencies and cache pressure related to STM metadata accesses. These techniques may leverage locality information (as reflected by the value of a respective locale guard) associated with each of a plurality of data partitions (locales) in a shared memory to elide various operations in transactional read/write fences when transactions access data in locales owned by their threads. The locale state may be disabled, free, exclusive, or shared. For a given memory access operation of an atomic transaction targeting an object in the shared memory, the system may implement the memory access operation using a contention mediation mechanism selected based on the value of the locale guard associated with the locale in which the target object resides. For example, a traditional read/write fence may be employed in some memory access operations, while other access operations may employ an optimized read/write fence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.