Using idempotent operations to improve transaction performance
US8418159B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2009 |
| Grant date | Apr 9, 2013 |
| Priority date | — |
| Expiry date | May 20, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/466
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for optimizing a transaction comprising an initial sequence of computer operations, the apparatus includes a processing unit which identifies one or more idempotent operations comprised within the initial sequence, and which reorders the initial sequence to form a reordered sequence comprising a first sub-sequence of the computer operations followed by a second sub-sequence of the computer operations, the second sub-sequence comprising only the one or more idempotent operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.