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US8421784B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 8, 2007 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | Aug 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/804
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment of the present invention, a display for receiving m-bit display data includes a display driver including a switched capacitor digital/analogue converter including an n-bit input, where m is not greater than n. The upper plates of the capacitors of the switched capacitor digital/analogue converter may be connected, in the zeroing phase, to one of a plurality of reference voltages. The choice of which reference voltage is connected to the upper plates of the capacitors of the switched capacitor digital/analogue converter in the zeroing phase is independent of the input n-bit digital code, and is determined by a signal internal to the display. The output voltage range from the converter in a decoding phase may be a first range in which output voltages are above and below one reference voltage or it may be a second range in which output voltages are above and below another reference voltage, depending on which reference voltage was selected in the preceding zeroing phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.