Semiconductor memory device and access method thereof
US8422333B2 · kind B2 · utility
1Cited by
3References
24Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 27, 2012 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | Jan 27, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4091
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Example embodiments provide a semiconductor memory device that may include: a cell array arranged in pluralities of rows and columns; and a sense amplifier conducting writing and reading operations to the cell array in response to writing and reading commands in correspondence with an access time, which may be variable in period. The sense amplifier adjusts pulse widths of write-in and read-out data in accordance with a period of the access time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.