Test apparatus and test method for testing a memory device
US8423842B2 · kind B2 · utility
5Cited by
12References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 18, 2010 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | Apr 27, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A test apparatus for testing a memory device including a memory cell. The test apparatus includes a storage and a controller. The storage stores a first value. The controller executes, at a given timing, determining a second value which is a threshold limit value to read data of the memory cell correctly on the basis of an output of the memory cell, calculating a difference between the first value and the second value, outputting a deterioration information on the basis of the difference between the first value and the second value, and updating the first value stored in the storage to the second value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.