Intelligent architecture creator

US8423929B2 · kind B2 · utility

Assignee

• Algotochip Corp. · US

Inventors

• Anand Pandurangan · Bengaluru, IN
• Pius Ng · Markham, CA
• Siva Selvaraj · Sunnyvale, US
• Sanjay Banerjee · San Jose, US
• Ananth Durbha · San Jose, US
• Suresh Kadiyala · Cupertino, US
• Satish Padmanabhan · Sunnyvale, US

Key dates

• Filing date: Oct 18, 2010
• Grant date: Apr 16, 2013
• Expiry date: May 19, 2031

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2115/10
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Systems and methods are disclosed to automatically generate a processor architecture for a custom integrated circuit (IC) described by a computer readable code. The IC has one or more timing and hardware constraints. The system extracts parameters defining the processor architecture from a static profile and a dynamic profile of the computer readable code; iteratively optimizes the processor architecture by changing one or more parameters until all timing and hardware constraints expressed as a cost function are met; and synthesizes the generated processor architecture into a computer readable description of the custom integrated circuit for semiconductor fabrication.