Light emitting diode chip and manufacturing method thereof
US8431934B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2011 |
| Grant date | Apr 30, 2013 |
| Priority date | — |
| Expiry date | Jul 7, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/83
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An exemplary LED chip includes a substrate, a buffer layer formed on the substrate and a light emitting layer formed on the buffer layer. The light emitting layer includes an n-type semiconductor layer and a p-type semiconductor layer. A first electrode is electrically connected with one of the n-type semiconductor layer and the p-type semiconductor layer. A second electrode is electrically connected with the other one of the n-type semiconductor layer and the p-type semiconductor layer. A bonding pad is formed on a top surface of the first electrode. A bonding wire is secured to the bonding pad. A ratio between a contacting area between the bonding pad and the top surface of the first electrode and an area of the top surface of the first electrode is no less than 6:10.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.