Receiver circuits for differential and single-ended signals
US8432185B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2011 |
| Grant date | Apr 30, 2013 |
| Priority date | — |
| Expiry date | May 25, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/7236
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Receiver circuits for differential and single-ended signals are disclosed. A receiver may include a differential amplifier configured to receive a first signal of a differential pair at a first input and a second signal of the differential pair at a second input when operating in differential mode, and a single-ended signal at the first input and a reference signal at a third input when operating in single-ended mode. The receiver may also include an inverter coupled to the differential amplifier. The inverter may be configured to provide a first beta ratio in differential mode and a second beta ratio in single-ended mode. Several receivers may be used, for example, to process a differential clock signal and one or more single-ended data signals referenced to the clock signal and/or differential data signals referenced to a single-ended clock signal. The rise/fall delays of each signal through each respective receiver may be independently adjusted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.