Card design with fully buffered memory modules and the use of a chip between two consecutive modules
US8432707B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 22, 2011 |
| Grant date | Apr 30, 2013 |
| Priority date | — |
| Expiry date | Oct 31, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4059
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An AMB component and a connection interface for a memory installation with fully buffered Dimm memory modules connected in series. The AMB component is disposed on a connecting line from memory modules to a memory controller of the memory installation to re-amplify the connecting line between two consecutive FBD memory modules. The connection interface includes an AMB amplifier component for the connection of a main memory card that includes at least one processor, to an auxiliary memory card of the type having a series of memory modules. Two series of FBD memory modules are connected to respective FBD channels in the auxiliary memory card using FBD connectors in a daisy-chain arrangement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.