Programmable signal processing circuit and method of interleaving
US8433881B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2012 |
| Grant date | Apr 30, 2013 |
| Priority date | — |
| Expiry date | Jan 24, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3455
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable signal processing circuit is used to (de-)interleave a data stream. Data from the signal stream is stored in a data memory (28) and read in a different sequence. The programmable signal processing circuit is used for computing addresses, for use in said storing and/or reading. The programmable signal processing circuit has an instruction set that contains an instruction to compute the addresses from preceding addresses that have been used for said storing and/or reading. In response to the instruction the programmable signal processing circuit permutes positions of a plurality of bits from the old address operand and forms of a bit of the new address result as a logic function of a combination of bits from the old address operand. Successive addresses are formed by means of repeated execution of a program loop that contains an address update instruction for computing the addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.