Conserving power by reducing voltage supplied to an instruction-processing portion of a processor
US8433940B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 28, 2012 |
| Grant date | Apr 30, 2013 |
| Priority date | — |
| Expiry date | Mar 28, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention provides a system that facilitates reducing static power consumption of a processor. During operation, the system receives a signal indicating that instruction execution within the processor is to be temporarily halted. In response to this signal, the system halts an instruction-processing portion of the processor, and reduces the voltage supplied to the instruction-processing portion of the processor. Full voltage is maintained to a remaining portion of the processor, so that the remaining portion of the processor can continue to operate while the instruction-processing portion of the processor is in reduced power mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.