Patent · US Active

Low power current-voltage mixed ADC architecture

US8436760B1 · kind B1 · utility

2Cited by

9References

20Claims

0Family size

Assignee

Marvell International Ltd. · BM

Inventors

Shingo Hatanaka · San Jose, US
Shafiq M. Jamal · Pleasanton, US
Hung Sheng Lin · San Jose, US
Ovidiu Carnu · Scotts Valley, US

Key dates

Filing date	Sep 15, 2010
Grant date	May 7, 2013
Priority date	—
Expiry date	Nov 30, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH03M1/38
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

The present disclosure includes systems and techniques relating to low power current-voltage mixed ADC architecture. In some implementations, an apparatus includes sample and hold circuitry, at least one ADC module configured to generate a first digital output based on a first analog input provided to the sample and hold circuitry, and current generation circuitry configured to modulate an analog output of the sample and hold circuitry to generate a residue output corresponding to the first analog input absent at least a portion corresponding to the first digital output, and to provide the residue output as a second analog input to further circuitry to generate a second digital output.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.