Sense-amplifier circuit for non-volatile memories that operates at low supply voltages
US8437196B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2010 |
| Grant date | May 7, 2013 |
| Priority date | — |
| Expiry date | Jun 16, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sense-amplifier circuit includes: a comparison stage that compares a cell current that flows in a memory cell and through an associated bitline, with a reference current, for supplying an output signal indicating the state of the memory cell; and a precharging stage, which supplies, during a precharging step prior to the comparison step, a precharging current to the bitline so as to charge a capacitance thereof. The comparison stage includes a first comparison transistor and by a second comparison transistor, which are coupled in current-mirror configuration respectively to a first differential output and to a second differential output, through which a biasing current flows. The precharging stage diverts, during the precharging step, the biasing current towards the bitline as precharging current, and allows, during the comparison step, passage of part of the biasing current towards the first differential output, enabling operation of the current mirror.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.