Phase locked loop capable of fast locking
US8437441B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2009 |
| Grant date | May 7, 2013 |
| Priority date | — |
| Expiry date | Jan 4, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase locked loop includes a voltage controlled oscillator operable to generate an output signal corresponding to a reference signal in response to a control voltage signal outputted by a filter in response to a current signal, and a variable frequency divider operable to perform frequency division on the output signal using a variable divisor so as to generate a divided feedback signal. A charge pump outputs the current signal in response to a phase detecting output from a phase/frequency detector indicating phases of the divided feedback signal and the reference signal. A phase error comparator outputs, in accordance with the phase detecting output, a digital output indicating whether the divided feedback signal lags or leads the reference signal and further indicating a phase difference between the divided feedback signal and the reference signal. The variable frequency divider determines a value of the variable divisor in accordance with the digital output to reduce the phase difference between the divided feedback signal and the reference signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.