Semiconductor integrated circuit for minimizing a deviation of an internal power supply from a desired value
US8438406B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 31, 2011 |
| Grant date | May 7, 2013 |
| Priority date | — |
| Expiry date | Oct 31, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
Abstract
A semiconductor integrated circuit includes first and second external terminals receiving an external power supply voltage, an internal power supply line coupling to the first and second external terminals, a first transistor coupling between the first external terminal and the internal power supply line, a second transistor that is coupled between the second external terminal and the internal power supply line, a first monitor line coupling to a first node of the internal power supply line, a second monitor line coupling to a second node of the internal power supply line, the second node being different from the first node, and a controller coupling to the first and second monitor lines, the controller outputs a control signal corresponding to potentials of the first and second monitor lines to the first and second transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.