Delay generator
US8441295B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2011 |
| Grant date | May 14, 2013 |
| Priority date | — |
| Expiry date | Dec 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/14
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A delay generator comprises: a current source for supplying a current; a first delay portion, connected to the current source, comprising at least a plurality of inverters and a first capacitor having a first capacitance; and a second delay portion, connected to the current source, comprising at least a plurality of inverters and a second capacitor having a second capacitance, wherein the first capacitance is the same as the second capacitance, wherein the first delay portion generates a first delay by discharging of the first capacitor, wherein the second delay portion generates a second delay by charging of the second capacitor, and wherein the total delay generated by the delay generator is obtained by summation of the first delay and the second delay.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.