Analog bus sharing using transmission gates
US8441298B1 · kind B1 · utility
15Cited by
44References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2009 |
| Grant date | May 14, 2013 |
| Priority date | — |
| Expiry date | Jul 29, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1732
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one example, a chip includes an integrated analog component configured to communicate over an internal analog bus of the chip. A plurality of I/O pads located on the chip is configured to provide a connected device access to the integrated analog component. A plurality of transmission gates configured to selectively connect the I/O pads to a bus line of the analog bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.