Semiconductor optical device
US8442085B2 · kind B2 · utility
8Cited by
1References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2010 |
| Grant date | May 14, 2013 |
| Priority date | — |
| Expiry date | Nov 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/22
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
By forming upper-bank patterns made of Au with a thickness of 1.5 μm or larger on bank portions, a solder material on a submount and a surface of a conductive layer in an upper part of a ridge portion of a laser chip are separated so as not to be in contact with each other, thereby preventing the stress generated in a bonding portion when bonding the laser chip and the submount from being applied to the ridge portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.