Patent · US Active

Apparatus and method for clock and data recovery

US8442173B2 · kind B2 · utility

4Cited by
1References
17Claims
0Family size

Assignee

Inventor

Key dates

Filing dateFeb 9, 2010
Grant dateMay 14, 2013
Priority date
Expiry dateSep 8, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/091
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Apparatus and methods for clock and data recovery are disclosed. In one embodiment, a clock and data recovery system includes a sampler, a deserializer, a phase detector and a frequency detector. The sampler may be configured to sample a serial data stream to produce data samples and transition samples. The deserializer may be configured to deserialize the data samples and the transition samples to produce deserialized data samples and deserialized transition samples. The deserialized data samples and the deserialized transition samples can be aligned and provided to the phase detector and the frequency detector, thereby improving phase alignment and cycle slip detection.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.