Patent · US Active

Secure boot method and semiconductor memory system using the method

US8443203B2 · kind B2 · utility

13Cited by
2References
30Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 24, 2008
Grant dateMay 14, 2013
Priority date
Expiry dateMar 14, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F21/575
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor memory system includes an external memory, an internal memory, and a one-time programmable (OTP) memory. The external memory includes a kernel, a public key, first boot information used to authenticate the public key and generate a test secret key, and a second boot loader verifying integrity of the kernel. The internal memory includes a first boot loader that verifies integrity of the second boot loader and generates the test secret key. The OTP memory includes second boot information generated using the public key and a secret key. Since the secure boot method and the semiconductor memory system using the method do not need an additional OTP memory to store a secret key unlike conventional technology, the capacity and recording time of the OTP memory can be reduced to about half compared to the conventional technology.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.