Patent · US Active

Parity check matrix optimization and selection for iterative decoding

US8443255B2 · kind B2 · utility

17Cited by
1References
36Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 26, 2010
Grant dateMay 14, 2013
Priority date
Expiry dateJun 22, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M13/2966
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A method of generating a parity check matrix for iterative decoding of a linear block code includes: determining a set of parity check vectors for the linear block code; ordering according to Hamming weight non-zero parity check vectors of the set; selecting a criterion for generating the parity check matrix; and building the parity check matrix by incrementally selecting according to the criterion a parity check vector for each consecutive row of the parity check matrix, wherein the parity check vector is selected from the ordered non-zero parity check vectors remaining in the set.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.