Hypervisor scheduler
US8443376B2 · kind B2 · utility
8Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2010 |
| Grant date | May 14, 2013 |
| Priority date | — |
| Expiry date | Aug 11, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/501
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for configuring a hypervisor scheduler to make use of cache topology of processors and physical memory distances between NUMA nodes when making scheduling decisions. In the same or other embodiments the hypervisor scheduler can be configured to optimize the scheduling of latency sensitive workloads. In the same or other embodiments a hypervisor can be configured to expose a virtual cache topology to a guest operating system running in a virtual machine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.