Analog circuit test device
US8446155B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 5, 2008 |
| Grant date | May 21, 2013 |
| Priority date | — |
| Expiry date | Feb 25, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2841
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The invention relates to a test device for an analog circuit to be mounted on a mixed circuit including said analog circuit and a synchronous digital circuit. The test device includes a disturbance emulator connected to a first supply source (UrefD) capable of disturbing a second supply source (UrefA) of the analog circuit, the first and second supply sources being optionally merged, the emulator being adapted for receiving data representative of the evolution, during a given duration, of the average (μI) and the typical deviation (σI) of a first inrush current (I) that would be applied to the first supply source by the digital circuit, and being adapted for applying to the first supply source during successive intervals, each successive interval having said duration, a second inrush current (Irep) equal to the sum of the average and of the product of the typical deviation and of a pseudo-random signal varying according to a Gaussian law.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.