Dual-loop feedback amplifying circuit
US8446217B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 17, 2009 |
| Grant date | May 21, 2013 |
| Priority date | — |
| Expiry date | Jul 17, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifying circuit arranged for converting an input signal into an amplified output signal comprising: an input node (11) at an input side of said circuit for receiving said input signal (pi); an output node (9) at an output side of said circuit for outputting said amplified output signal (io); a first gain element (M1) connected between said input and output nodes and provided for converting an input voltage taken from said input signal into a current for forming said amplified output signal; a negative feedback loop (3) over said first gain element, said negative feedback loop having first elements (5, 6) arranged for providing input matching; and a positive feedback loop (2) over said first gain element, said positive feedback loop having second elements (7, 8) arranged for providing additional input matching and gain enhancement of said first gain element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.