System and method of analog-to-digital converters
US8446303B2 · kind B2 · utility
1Cited by
5References
18Claims
0Family size
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Key dates
| Filing date | Oct 13, 2010 |
| Grant date | May 21, 2013 |
| Priority date | — |
| Expiry date | Oct 11, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/442
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter system that includes a pipeline including N successively-cascaded signal converters, each converting, according to a first clock signal, a respective portion of an input signal of the pipeline into digital codes, a code aligner for receiving and aligning the digital codes from the signal converters in the pipeline into a digital output of the system, an error extractor coupled to an amplifier input node of a selected one signal converter via a first switch for extracting an error signal, and a load system coupled to the amplifier input node of the selected one signal converter via a second switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.