Image processing method and circuit
US8446523B2 · kind B2 · utility
1Cited by
9References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2009 |
| Grant date | May 21, 2013 |
| Priority date | — |
| Expiry date | Sep 21, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/014
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image processing circuit includes a de-interlace circuit, a motion interpolation circuit and a frame processing circuit. The image processing circuit receives a first field and a second field respectively from two successive film frames. A plurality of block motion vectors are calculated according to the first field and the second field. A plurality of interpolated frames are calculated according to the first field, the second field and the plurality of motion vectors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.