Multidimensional network sorter integrated circuit
US8447950B1 · kind B1 · utility
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12References
19Claims
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Key dates
| Filing date | Nov 2, 2010 |
| Grant date | May 21, 2013 |
| Priority date | — |
| Expiry date | Nov 2, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/901
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A technique to implement an integrated multidimensional sorter is to store data such that it may be retrieved in a sorted fashion. Entries are stored into a memory according to time stamp value, and the time stamp value is divided into multiple portions. The memory is organized as a pointer memory. An integrated multidimensional sorter may be implemented using integrated circuit technology using one or more integrated circuits. These integrated circuits may be used in management of network traffic, and provides quality of service (QoS) control.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.